【公開日：2024.07.25】【最終更新日：2024.06.04】
課題データ / Project Data
課題番号 / Project Issue Number
23TU0007
利用課題名 / Title
圧電薄膜MEMSデバイス開発
利用した実施機関 / Support Institute
東北大学 / Tohoku Univ.
機関外・機関内の利用 / External or Internal Use
内部利用（ARIM事業参画者以外）/Internal Use (by non ARIM members)
技術領域 / Technology Area
【横断技術領域 / Cross-Technology Area】（主 / Main）加工・デバイスプロセス/Nanofabrication（副 / Sub）-
【重要技術領域 / Important Technology Area】（主 / Main）高度なデバイス機能の発現を可能とするマテリアル/Materials allowing high-level device functions to be performed（副 / Sub）-
キーワード / Keywords
pMUT,アクチュエーター/ Actuator,MEMS/NEMSデバイス/ MEMS/NEMS device,蒸着・成膜/ Vapor deposition/film formation,膜加工・エッチング/ Film processing/etching,光リソグラフィ/ Photolithgraphy
利用者と利用形態 / User and Support Type
利用者名（課題申請者）/ User Name (Project Applicant)
Andrea Vergara
所属名 / Affiliation
東北大学大学院工学研究科
共同利用者氏名 / Names of Collaborators in Other Institutes Than Hub and Spoke Institutes
ARIM実施機関支援担当者 / Names of Collaborators in The Hub and Spoke Institutes
利用形態 / Support Type
（主 / Main）機器利用/Equipment Utilization（副 / Sub）,技術補助/Technical Assistance
利用した主な設備 / Equipment Used in This Project
TU-063：i線ステッパ
TU-201：DeepRIE装置#1
TU-108：水素アニール装置
報告書データ / Report
概要（目的・用途・実施内容）/ Abstract (Aim, Use Applications and Contents)
This study aims to develop MEMS devices using thin film piezoelectric materials. In particular, the objective is to develop piezoelectric micromachined ultrasonic transducers (pMUT) using epitaxial Lead Zirconate Titanate (PZT) thin film on Silicon-on-Nothing (SoN) structure. Depending on the resonance frequency of the pMUT, it can be used for a variety of applications such as medical imaging, fingerprint sensor and ToF (time of flight) distance sensor. Recently, new potential applications such as haptics for human-machine interaction (HMI), therapy and as an actuation mechanism via acoustic radiation pressure have caught researchers interest and widen the required resonance frequency range, which would larger membranes than conventionally developed. The contents of this report include the beginning of the first trial on fabricating a large membrane (more than 200 um diameter) using SoN technology, since the study is still ongoing.
実験 / Experimental
To investigate the membrane fabrication size limitation by Silicon-on-Nothing (SoN) technology, a bare silicon wafer was used to try to fabricate big membranes up to 2 mm in diameter. The process consist in making small holes, closely packed and then annealing in H2 atmosphere for a relatively long time (about 2 hours). However, the hole diameter should be sub-micron level and the pitch should also be within a couple of microns, or the surface will just become rough after the annealing instead of creating a uniform membrane. T. Sato et al. [1] reported the resulting cavities made by SoN under several conditions of hole diameter, depth and pitch for small membranes. Taking into consideration these previous experiments, several combinations of hole diameter and pitch (depth is determined to be constant) were planned for this research.
First, since the required feature dimensions are slightly too small for normal photolithography process, a fine alignment reticle (FRA) was prepared and a i-line stepper equipment (TU-063) was used to pattern the photoresist. Hole diameter (a) tested was either 400 nm, 600 nm, 800 nm, and 1000 nm, while the pitch (c) used was either a+ 500nm, 1000 nm or 1500 nm, for membrane sizes of 2 mm as shown in Figure 1.
After the lithography was completed, the Si wafer was etched using an ICP-RIE (TU-201) machine with a low scallop recipe to minimize the etching bias. The wafer after the etching process is shown in Figure 2. Before continuing to the annealing process, the wafer was observed to confirm the condition of the trenches. Observation was first attempted by optical microscope as shown in Figure 3, but due to the small size of the holes it was difficult to observe with detail so it was later observed by SEM after cutting a cross-section as shown in Figure 4.
Then, the sample was annealed at 1000 degrees Celsius for 2 hours in H2 atmosphere using the equipment TU-108 and was confirmed that the surface looked smooth after the annealing, although more detailed evaluation is currently under progress.
結果と考察 / Results and Discussion
The current status on the big membrane fabrication for pMUT development via SoN technology was described in this brief report. Up to this point, the fabrication process has advanced as expected, but membrane's observation and confirmation of successful fabrication is pending. It is expected to determine the maximum membrane size possible using this technique in order to be able to develop SoN epitaxial PZT-based pMUTs [2] in a wide range of sizes for different applications easily, cheaply and with remarkable quality by ensuring a uniform and repeatable Si membrane structure.
図・表・数式 / Figures, Tables and Equations
Fig. 1 Trench pattern conditions
Fig. 2 Si wafer after trench etching by deep RIE process
Fig. 3 Observation of smallest etched pattern by optical microscope
Fig. 4 Observation of etched trenches cross-section by SEM
その他・特記事項（参考文献・謝辞等） / Remarks(References and Acknowledgements)
References
[1] Tsutomu Sato, Ichiro Mizushima, Shuichi Taniguchi, Keiichi Takenaka, Satoshi Shimonishi, Hisataka Hayashi, Masayuki Hatano, Kazuyoshi Sugihara and Yoshitaka Tsunashima, "Fabrication of Silicon-on-Nothing Structure by Substrate Engineering Using the Empty-Space-in-Silicon Formation Technique", Japanese Journal of Applied Physics 43 12-18, 2004.
[2] Takuma Sekiguchi, Shinya Yoshida, Yoshiaki Kanamori, and Shuji Tanaka, "EPITAXIAL PB(ZR,TI)O3-BASED PIEZOELECTRIC MICROMACHINED ULTRASONIC TRANSDUCER FABRICATED ON SILICON-ON-NOTHING (SON) STRUCTURE", in Proc. of 20 IEEE 36th International Conference on Micro Electro Mechanical Systems (MEMS) (15 - 19 January, Munich, Germany) pp. 139-142, 2023.
成果発表・成果利用 / Publication and Patents
論文・プロシーディング（DOIのあるもの） / DOI (Publication and Proceedings)
口頭発表、ポスター発表および、その他の論文 / Oral Presentations etc.
特許 / Patents
特許出願件数 / Number of Patent Applications：0件
特許登録件数 / Number of Registered Patents：0件