利用報告書 / User's Reports


【公開日:2024.07.25】【最終更新日:2024.05.21】

課題データ / Project Data

課題番号 / Project Issue Number

23UT0190

利用課題名 / Title

極薄膜GeOI nMOSFETのキャリア輸送特性と性能向上に関する研究

利用した実施機関 / Support Institute

東京大学 / Tokyo Univ.

機関外・機関内の利用 / External or Internal Use

内部利用(ARIM事業参画者以外)/Internal Use (by non ARIM members)

技術領域 / Technology Area

【横断技術領域 / Cross-Technology Area】(主 / Main)計測・分析/Advanced Characterization(副 / Sub)-

【重要技術領域 / Important Technology Area】(主 / Main)高度なデバイス機能の発現を可能とするマテリアル/Materials allowing high-level device functions to be performed(副 / Sub)量子・電子制御により革新的な機能を発現するマテリアル/Materials using quantum and electronic control to perform innovative functions

キーワード / Keywords

環境制御マニュアルプローバステーション、,先端半導体(超高集積回路)/ Advanced Semiconductor (Very Large Scale Integration),原子薄膜/ Atomic thin film


利用者と利用形態 / User and Support Type

利用者名(課題申請者)/ User Name (Project Applicant)

韓 雪揚

所属名 / Affiliation

東京大学 大学院工学系研究科

共同利用者氏名 / Names of Collaborators in Other Institutes Than Hub and Spoke Institutes

高木信一

ARIM実施機関支援担当者 / Names of Collaborators in The Hub and Spoke Institutes
利用形態 / Support Type

(主 / Main)機器利用/Equipment Utilization(副 / Sub)-


利用した主な設備 / Equipment Used in This Project

UT-305:環境制御マニュアルプローバステーション


報告書データ / Report

概要(目的・用途・実施内容)/ Abstract (Aim, Use Applications and Contents)

Due to aggressive device scaling, Si logic CMOS is approaching its physical limit. To achieve higher integration, Si FinFETs are expected to be replaced by stacked Gate-All-Around (GAA) nanosheets and 3D sequential CFETs, enabling the integration of hetero channel orientations and materials. Among potential materials, (111) Ge stands out as a promising choice for nMOSFETs due to its low in-plane effective mass and high quantization effective mass, particularly suitable for extremely-thin body (ETB) channels due to the suppression of surface roughness scattering. In this study, we propose a flipped Ge-on-Insulator (GOI) fabrication method to enhance the quality of ETB (111) GOI. The flipped (111) GOI nMOSFETs demonstrate significant performance improvements across a broad range of channel thicknesses compared to previous methodologies. Furthermore, we systematically investigate the carrier transport properties by measuring effective mobilities at various environmental temperatures using low-temperature prober systems provided by ARIM.

実験 / Experimental

【利用した主な装置】Environmental control manual prober station, low-temperature prober (CRX-4K)【実験方法】 Low-temperature prober (CRX-4K) is a functional system capable of adjusting the measurement environment temperature from 350K to below 50K. This system facilitates the differentiation of distinct scattering regimes in MOSFET devices through the manipulation of measurement temperatures.

結果と考察 / Results and Discussion

Through the utilization of a low-temperature prober, we have distinguished surface roughness scattering, phonon scattering, and Coulomb scattering in ETB (111) GOI nMOSFETs. We are currently studying the physical mechanisms underlying these scattering regimes in GOI nMOSFET devices and exploring strategies to enhance device performances.

図・表・数式 / Figures, Tables and Equations


Appearance of the low temperature prober (CRX-4K)


その他・特記事項(参考文献・謝辞等) / Remarks(References and Acknowledgements)

本研究の一部は、科学研究費補助金 (22H00208)の支援により実施した。


成果発表・成果利用 / Publication and Patents

論文・プロシーディング(DOIのあるもの) / DOI (Publication and Proceedings)
口頭発表、ポスター発表および、その他の論文 / Oral Presentations etc.
  1. X. Han, C.-T. Chen, K. Sumita, K. Toprasertpong, M. Takenaka, and S. Takagi, “Performance Enhancement of Extremely-thin Body (111) Ge-on-Insulator nMOSFETs by Using Flipped Substrate Process”, 第84回応用物理学会秋季学術講演会, 20a-A304-8, 熊本城ホール他, 2023年9月19-23日.
特許 / Patents

特許出願件数 / Number of Patent Applications:0件
特許登録件数 / Number of Registered Patents:0件

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