【公開日：2023.08.01】【最終更新日：2023.05.23】

課題データ / Project Data

課題番号 / Project Issue Number

22TT0031

利用課題名 / Title

GaNを用いたパワーデバイス作製それに用いるプロセス技術の開発

利用した実施機関 / Support Institute

豊田工業大学 / Toyota Tech.

機関外・機関内の利用 / External or Internal Use

内部利用（ARIM事業参画者）/Internal Use (by ARIM members)

技術領域 / Technology Area

【横断技術領域 / Cross-Technology Area】（主 / Main）加工・デバイスプロセス/Nanofabrication（副 / Sub）計測・分析/Advanced Characterization

【重要技術領域 / Important Technology Area】（主 / Main）高度なデバイス機能の発現を可能とするマテリアル/Materials allowing high-level device functions to be performed（副 / Sub）-

キーワード / Keywords

原子層堆積（ALD）装置/ Atomic layer deposition (ALD)、化合物半導体/ Compound semiconductor、パワーエレクトロニクス/ Power electronics,蒸着・成膜/Evaporation and Deposition,ALD,リソグラフィ/Lithography,膜加工・エッチング/Film processing and Etching,光学顕微鏡/Optical microscopy,蒸着・成膜/Evaporation and Deposition,ALD,膜加工・エッチング/Film processing and Etching,高周波デバイス/ High frequency device,パワーエレクトロニクス/ Power electronics

利用者と利用形態 / User and Support Type

利用者名（課題申請者）/ User Name (Project Applicant)

Villamin Maria Emma

所属名 / Affiliation

豊田工業大学大学院工学研究科

共同利用者氏名 / Names of Collaborators in Other Institutes Than Hub and Spoke Institutes

日野晃貴,川田宗一郎,岩田直高

ARIM実施機関支援担当者 / Names of Collaborators in The Hub and Spoke Institutes

利用形態 / Support Type

（主 / Main）機器利用/Equipment Utilization（副 / Sub）-

利用した主な設備 / Equipment Used in This Project

TT-003：原子層堆積装置
TT-006：マスクアライナ装置
TT-015：デジタルマイクロスコープ群
TT-017：表面形状測定器（段差計）
TT-016：エリプソメーター

報告書データ / Report

概要（目的・用途・実施内容）/ Abstract (Aim, Use Applications and Contents)

The aim of this project is to fabricate pGaN device structures, specifically pGaN/AlGaN/GaN based power devices and cloverleaf van der pauw (CVNP) structure. The pGaN device fabrications are part of the theses of Mr. Kouki Hino (B4) and Ms. Junna Miake (B4), who are student members of the Advanced Electronic Device Laboratory (same laboratory as the author). In pGaN HEMT process, two ALD deposited films are needed to fabricate the devices: silicon dioxide (SiO₂) and silicon nitride (SiN) films. The deposited SiO₂ film was used as SiO₂-photomask with mesa patterns during the isolation mesa etching process. Whereas, the deposited SiN film was used as a passivation layer for the devices. We have successfully fabricated GaN power devices with good isolation and passivation layer using ALD deposited SiO₂ and SiN film, respectively. On the other hand, the CVNP structure is used to investigate ArF laser for pGaN activation. Similar to the HEMT fabrication, the cloverleaf mesa pattern was formed using dry etcher with SiO₂-photomask pattern. Some results of HEMT device performance [1] and resistivities of the ArF activated pGaN layer with CVNP structure [2] (not shown here) were presented during 70^th JSAP Spring Meeting 2023.

実験 / Experimental

The wafer structure used included a super lattice buffer layer, a GaN layer, an AlGaN layer, and a p-type GaN layer on a silicon substrate. The samples are 2.5 cm square (13 samples) cleaved from an 8-inch wafer. Briefly, the p-GaN HEMT device fabrication process are as follows: (a) etching of pGaN mesa, (b) etching of GaN mesa for device isolation, (c) deposition of Ti/Al/Ti/Au and annealing to make ohmic contact for the source and drain contact, (d) deposition of Ni/Au for the pGaN gate contact, and (e) deposition of SiN film for passivation.  From the above process, the ALD depositions of SiO₂ film were mainly used in the p-GaN etching (a) and device mesa etching (b) using a dry etcher. The SiO₂-photomask with mesa patterns was used because SiO₂ can withstand the Cl₂ gases during etching. Specifically, to make SiO₂-photomask, all samples and a dummy silicon substrate (as reference SiO₂ thickness) were first deposited with a SiO₂ film (Fig. 1). Afterwards, the mesa patterns were transferred to the SiO₂ film by using standard photolithography and the excess SiO₂ film were wet chemically (BHF solution) etched. Lastly, photoresist were stripped using photoresist remover. On the other hand, for the CVNP structure, the wafer structure used include 200um-thick Mg-doped GaN layer (unactivated pGaN) and an undoped GaN layer on a Sapphire substrate. Similar to the HEMT process mentioned above, standard photolithography and metal deposition were used to make CVNP structure. The fabrication steps are as follows: (i) thick SiO2 film deposition using ALD, (ii) cloverleaf mesa pattern formation via etching, (iii) In/Au contact formation, and (iv) metal contact annealing at 450°C using RTA. The resistivity at different laser irradiation power used to activate the pGaN CVNP structure were then investigated.

結果と考察 / Results and Discussion

For the HEMT device, it was found that the thickness of the deposited SiO₂ film is about 150 nm using an ellipsometer, which is close to the target deposition thickness. The etch rate of SiO₂: GaN is 1:5, thus SiO₂ is etched much slower than GaN under the BCl₃ etching conditions. Thus, the deposited SiO₂ film is enough to etch 100 nm GaN to make the mesa. The etched mesa height is ~100 μm measured using an alpha step profiler. This height is close to target, which is enough to cut the channel layer to isolate each devices on the wafer. The fabricated devices before SiN film deposition and under an optical microscope are shown in Fig 2 and Fig 3, respectively. It was found that the thickness of the deposited SiN film is around 7.5 nm via an ellipsometer. This thickness value is very close to the target deposition SiN thickness. These results shows that ALD thickness control on deposited film is very good, which is important for the etching process during the device fabrication. Moreover, the results of the device performance shows good modulation [1] indicating that the devices are properly isolated and passivated.On the other hand, the fabricated CVNP structure after laser irradiation is shown in Fig. 4 [2]. It can be seen that the cloverleaf pattern mesa is clearly defined and the irradiation mark is at the center, which indicates that local pGaN activation using this structure is possible.

図・表・数式 / Figures, Tables and Equations

Fig. 1 ALD deposition of SiO₂ film.   

Fig. 2 SiN film on fabricated devices.

Fig. 3 Fabricated device.

Fig. 4 Fabricated CVNP structure after laser irradiation [2]. 

その他・特記事項（参考文献・謝辞等） / Remarks(References and Acknowledgements)

・参考文献：[1] K. Hino, M.E. Villamin & N. Iwata, 70^th JSAP Spring Meeting, 16p-PA04-16, 2023.  [2] M.E. Villamin & N. Iwata, 70^th JSAP Spring Meeting, 16p-PA04-13, 2023.

成果発表・成果利用 / Publication and Patents

論文・プロシーディング（DOIのあるもの） / DOI (Publication and Proceedings)

1. Soichiro Kawata, Breakdown voltage enhancement of p-GaN/AlGaN/GaN diode by controlling Mg acceptors for compensating residual Si donors, Japanese Journal of Applied Physics, 62, SA1004(2022).
   DOI: 10.35848/1347-4065/ac7630
   

口頭発表、ポスター発表および、その他の論文 / Oral Presentations etc.

1. (1) K. Hino, M.E. Villamin, & N. Iwata, 70th JSAP Spring Meeting, 16p-PA04-16, 2023
2. M.E. Villamin, & N. Iwata, 70th JSAP Spring Meeting, 16p-PA04-13, 2023.

特許 / Patents

特許出願件数 / Number of Patent Applications：0件
特許登録件数 / Number of Registered Patents：0件