利用報告書 / User's Report

【公開日:2023.07.28】【最終更新日:2023.05.17】

課題データ / Project Data

課題番号 / Project Issue Number

22BA0041

利用課題名 / Title

イオン輸送を利用して動作するメモリスタ素子の電気特性評価

利用した実施機関 / Support Institute

筑波大学

機関外・機関内の利用 / External or Internal Use

外部利用/External Use

技術領域 / Technology Area

【横断技術領域 / Cross-Technology Area】(主 / Main)計測・分析/Advanced Characterization(副 / Sub)-

【重要技術領域 / Important Technology Area】(主 / Main)高度なデバイス機能の発現を可能とするマテリアル/Materials allowing high-level device functions to be performed(副 / Sub)-

キーワード / Keywords

Memristor, Synapse, Neuromorphic


利用者と利用形態 / User and Support Type

利用者名(課題申請者)/ User Name (Project Applicant)

NUR Roda Omar

所属名 / Affiliation

物質・材料研究機構

共同利用者氏名 / Names of Collaborators in Other Institutes Than Hub and Spoke Institutes
ARIM実施機関支援担当者 / Names of Collaborators in The Hub and Spoke Institutes
利用形態 / Support Type

(主 / Main)機器利用/Equipment Utilization(副 / Sub),技術補助/Technical Assistance


利用した主な設備 / Equipment Used in This Project

BA-013:半導体特性評価システム


報告書データ / Report

概要(目的・用途・実施内容)/ Abstract (Aim, Use Applications and Contents)

This study explored the development of forming-free crossbar array memristors for neuromorphic applications. The resistive switching layer consists of a bilayer structure using ZnO (semiconductor) and HfO2 (insulator). An evaluation of the impacts of metal contacts on the resistive switching behavior was explored. A [4x4] crossbar array was fabricated with 100% yield and its synaptic behavior of long-term potentiation and depression was also evaluated.

実験 / Experimental

Silicon substrate was cleaned with Acetone and IPA using a sonicator. TiN bottom electrode was deposited by DC sputtering (i-Miller CFS-4EP-LL) using a Ti target with Nitrogen gas flow. The resistive switching layer was deposited by RF sputtering of 6nm of ZnO from ZnO target and followed by 4 nm of HfO2 using HfO2 target using O2 and Ar gas flow. Photolithography [Heidelberg DWL66+] process was used to pattern the top electrode. The top electrode was deposited using e-beam evaporation (R-DEC ADS-E86) with Pt and Ti/Pt thin films. Liftoff was done followed by IPA cleaning.

結果と考察 / Results and Discussion

Modern computing systems are based on the Von Neumann architecture where the computing/logic is physically separated from the memory which results in limited processing speeds. Developing neuromorphic computing systems involves developing a new architecture based off the human brain. A Neuromorphic computing system offers advantages such as low power consumption, complex and parallel processing. Memristor devices are two terminal memory devices based on resistive switching. They have been previously demonstrated to mimic synaptic behaviors and are considered to be a promising device for acting as a synapse in a neuromorphic architecture. Traditional memristor devices display digital switching where an abrupt set (low resistance state [LRS]) and reset (high resistance state [HRS]) is observed. For neuromorphic applications, analog switching behavior of gradual conductance modulation is preferred since it mimics neuron’s synaptic plasticity.The device structure and image of the crossbar array can be seen in Fig 1. To switch between digital and analog resistive switching, different top electrodes on HfO2 was evaluated. Fig 2 shows the hysteresis characteristics of the digital memristor (Pt) and the analog memristor (Ti-Pt). A gradual high resistance state modulation was achieved by inserting an interlayer of Ti that functions as an oxygen getter. Fig 3 shows a comparison between the digital and analog memristor during a set (high resistance state to low resistance state switching) and reset (low resistance state to high resistance state switching). A 4x4 crossbar was fabricated with device cell sizes of 2μm x 2μm. All 16 devices worked with 100% yield and showed forming-free switching behavior.To test the synaptic plasticity of the analog memristor, the long-term potentiation (LTP) and long-term depression (LTD) was measured in Fig 4. A constant amplitude pulse train consisting of write pulses (LTP using positive voltages and LTD using negative voltages) was applied. This device showed conductance modulation which demonstrates synaptic capability. 

図・表・数式 / Figures, Tables and Equations


Fig 1. Device structure and image of crossbar array



Fig 2. (a)Pt top electrode hysteresis characteristics(b) Ti-Pt top electrode hysteresis characteristics



Fig 3. Digital and Analog resistive switching characteristic



Fig 4. Synaptic Plasticity LTP/LTD


その他・特記事項(参考文献・謝辞等) / Remarks(References and Acknowledgements)


成果発表・成果利用 / Publication and Patents

論文・プロシーディング(DOIのあるもの) / DOI (Publication and Proceedings)
口頭発表、ポスター発表および、その他の論文 / Oral Presentations etc.
特許 / Patents

特許出願件数 / Number of Patent Applications:0件
特許登録件数 / Number of Registered Patents:0件

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